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松山湖材料實(shí)驗(yàn)室招聘功率半導(dǎo)體器件工程師;技術(shù)書寫工程師;燒結(jié)膏/電子封裝材料工程?
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Power Device Engineer 功率半導(dǎo)體器件工程師 The power device engineer will be responsible for the benchmarking, characterization, testing and optimal performance definition in all levels of the power electronic applications from bare die, packaged platform, and systems. You are also responsible for product datasheet maintenance with all required data and format. You will work closely with the cross disciplinary team members for product development and product performance definition and characterization. 功率器件工程師將負(fù)責(zé)裸芯片、封裝平臺和系統(tǒng)的所有級別的功率電子應(yīng)用中的基準(zhǔn)測試、表征、測試和最佳性能定義。同時(shí)該職位還將負(fù)責(zé)使用所有必需的數(shù)據(jù)和格式維護(hù)產(chǎn)品數(shù)據(jù)表，與跨學(xué)科團(tuán)隊(duì)成員緊密合作，以進(jìn)行產(chǎn)品開發(fā)以及產(chǎn)品性能的定義和表征。 Job Responsibility 1, Work with system engineer to understand the system level requirements for the product. Propose appropriate bare die options with available sourcing channel. Proactively acquire die samples (including mechanical die) for characterization and record the data, and quotes as part of the proposal. 與系統(tǒng)工程師一起了解產(chǎn)品的系統(tǒng)級要求，提示適當(dāng)?shù)穆阈酒蜻x產(chǎn)品，并挖掘可用的采購渠道，主動(dòng)獲取芯片樣品（包括機(jī)械樣品）以進(jìn)行表征并記錄數(shù)據(jù)，并作為報(bào)價(jià)的一部分進(jìn)行報(bào)價(jià)。 2, Characterization of power module sample and provide feedback to design for performance update. Work with system engineer regarding module level update. Collect all data necessary for datasheet preparation. 功率模塊樣品的表征，并為設(shè)計(jì)提供反饋以進(jìn)行性能更新。與系統(tǒng)工程師合作進(jìn)行模塊級別更新，收集產(chǎn)品數(shù)據(jù)手冊所需要的數(shù)據(jù)。 3, Work with testing engineer regrading all biased qualification/reliability testing and data collection. Work with design engineer for fixture design required by all testing. 與測試工程師合作，對所有qual測試以及可靠性測試進(jìn)行數(shù)據(jù)收集，與設(shè)計(jì)工程師合作進(jìn)行測試夾具的設(shè)計(jì)。 4, Co-owner of list of materials for testing in the High Power Lab. 大功率電力電子實(shí)驗(yàn)室中，同步負(fù)責(zé)所有測試材料。 5, Propose FA per poor performance observed and/or failed samples. Work with FA to define possible cross sectional area for further investigation. 根據(jù)觀察到的不良性能和、或失效的樣本提出可能的失效原因，與FA工程師合作確定可能的檢測的橫斷界面，以供進(jìn)一步進(jìn)行失效的根本原因分析。 Requirements 1, B.S. or above degree in Electrical, Electronics, System Engineering, and Physics or related discipline 電氣工程， 電子，系統(tǒng)工程，物理等相關(guān)專業(yè)本科及以上學(xué)歷。 2, Experience or familiar with high voltage/high power applications. 熟悉或在高壓、大功率電力電子應(yīng)用領(lǐng)域有經(jīng)驗(yàn)。 3, Experience and/or knowledge in power electronic devices such as Si IGBT, MOSFET, Diode, SiC MOSFET, SBD, and GaN… etc. 有功率器件，如Si IGBT, MOSFET, Diode, SiC MOFET, SBD,以及GaN的知識儲備或經(jīng)驗(yàn)。 4, Familiar with characterization and testing of the power devices above. Know the Pros and Cons of each devices. 熟悉以上所屬的功率器件的表征和測試，理解各種器件之間的特性及優(yōu)劣勢。 5, Familiar with device physics with certain knowledge in the processes of manufacturing 熟悉器件物理知識，且有一定的器件生產(chǎn)制造過程知識。 6, Passion in Wide Band Gap devices performance enhancement in all levels of applications 對提高WBG器件在系統(tǒng)中應(yīng)用的性能充滿激情。 職位名稱：技術(shù)書寫工程師 職位描述：技術(shù)書寫工程師將負(fù)責(zé)協(xié)助工程師制定、組織、編寫公司需要的技術(shù)文件，并負(fù)責(zé)管理技術(shù)文件的更新和修訂。 主要職責(zé)：1、與內(nèi)部團(tuán)隊(duì)合作以了解產(chǎn)品文檔要求； 2、與項(xiàng)目工程師共同編寫和編輯技術(shù)文檔； 3、維護(hù)全面的技術(shù)術(shù)語和文檔庫； 4、分析文檔以保持內(nèi)容樣式的連續(xù)性； 5、管理技術(shù)文獻(xiàn)的更新和修訂 任職要求：1、本科及以上學(xué)歷，理工科畢業(yè)生； 2、能用英文進(jìn)行溝通和書寫； 3、有較好的文字功底，能掌握技術(shù)寫作規(guī)范，具備良好的邏輯思維能力； 4、有良好的團(tuán)隊(duì)合作精神，注重細(xì)節(jié)。 Sintering Paste/Electronic Packaging Material Engineer 燒結(jié)膏/電子封裝材料工程師 The Sintering Paste/Electronic Packaging Material Engineer will be responsible for the nano sintering material selection, binder selection, synthesis, and process development for sintering paste used for power electronic applications. And also responsible for research and development of potential packaging materials by synthesis, composites and/or hybrid material build-up. 燒結(jié)膏/電子封裝材料工程師主要負(fù)責(zé)用于功率電子應(yīng)用的納米燒結(jié)材料的選擇，粘合劑選擇，合成， 工藝的開發(fā)。同時(shí)該工程師還負(fù)責(zé)潛在封裝材料的開發(fā)， 包括某些創(chuàng)新封裝材料，復(fù)合材料和/或混合材料的開發(fā)。 Job Responsibilities 工作職責(zé) 1, Work with all required suppliers to source raw materials for sintering paste synthesis. 調(diào)研潛在供應(yīng)商，確定原材料供應(yīng)商。 2, Conduct process development and optimization to confirm the optimal formula to synthesize sintering paste with appropriate sintering process definition. 進(jìn)行工藝開發(fā)和優(yōu)化，以確認(rèn)最佳的配方， 以最適當(dāng)?shù)臒Y(jié)工藝定義合成燒結(jié)膏。 3, Work with testing engineer, FA engineer and external suppliers to assess mechanical, thermal and electrical properties of the sintered paste. 同測試工程師，失效模式分析工程師以及外部的供應(yīng)商，對所合成的材料進(jìn)行機(jī)械性能、熱性能以及電氣性能的評估。 4, Work with testing engineer to set up qualification standards and reliability assessment of sintered paste. 與測試工程師緊密合作，建立材料質(zhì)量檢測以及可靠性檢測的標(biāo)準(zhǔn)。 5, Research opportunities in new synthesis of packaging materials such as alloys, organic materials for thermal management/ packaging, inorganic packaging/thermal management materials or hybrid/ Composite materials for packaging 進(jìn)行創(chuàng)新封裝材料的研發(fā)，如合金材料， 用于封裝或熱管理的有機(jī)/無機(jī)材料，復(fù)合材料等。 6, Research materials for surface treatment to enhance either physical or chemical properties 通過物理或化學(xué)方法進(jìn)行表面處理的材料的研發(fā)。 Requirements 1, BS degree or above in Material Science/Engineering, Chemical Engineering and related discipline or with certain years of experience. 碩士及以上學(xué)歷，材料科學(xué)， 材料工程， 化學(xué)工程或相關(guān)專業(yè)，或有相關(guān)領(lǐng)域工作經(jīng)驗(yàn)。 2, Work or research experience in sintering paste development. 有燒結(jié)膏領(lǐng)域工作或研發(fā)經(jīng)驗(yàn)。 3, Work or research or interested in electronic packaging materials synthesis/development. 有電子封裝材料領(lǐng)域的研發(fā)或工作經(jīng)驗(yàn)， 或?qū)Υ祟I(lǐng)域感興趣者優(yōu)先。 4, Good background in material characterization with appropriate tools such as X-ray, EDX, SEM, spectrum analyzer, … etc. 有材料表征工具如X-Ray, SEM, EDX, Spectrum analyzer經(jīng)驗(yàn)。 5, Familiar with analysis, process and synthesis lab setup, equipment, and safety protocols. 熟悉材料分析，工藝及材料合成實(shí)驗(yàn)室的設(shè)置，設(shè)備及安全規(guī)程。 郵箱：2147162848@qq.com |
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